Improvements and Issues implementation

Major:
- Issue #3: added raw ADC1, ADC2 values to the setScopeChannel
- Issue #4: added functionality for joystick control. Middle resting potis are now supported (by default it is enabled)
- Issue #6: implemented that board does not power-off after a software reset due to flashing
- added Rate constraints for Input target for smoother response

Minor:
- added 2 beep sound when motors get enabled
- minor bugfixes

01_Matlab/99_RecycleBin/RateLimiter_fixdt/rateLimiter.c

@@ -0,0 +1,191 @@
+/*
+ * File: rateLimiter.c
+ *
+ * Code generated for Simulink model 'rateLimiter'.
+ *
+ * Model version                  : 1.1186
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sun Oct 27 16:29:07 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#include "rateLimiter.h"
+#ifndef UCHAR_MAX
+#include <limits.h>
+#endif
+
+#if ( UCHAR_MAX != (0xFFU) ) || ( SCHAR_MAX != (0x7F) )
+#error Code was generated for compiler with different sized uchar/char. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if ( USHRT_MAX != (0xFFFFU) ) || ( SHRT_MAX != (0x7FFF) )
+#error Code was generated for compiler with different sized ushort/short. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if ( UINT_MAX != (0xFFFFFFFFU) ) || ( INT_MAX != (0x7FFFFFFF) )
+#error Code was generated for compiler with different sized uint/int. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if ( ULONG_MAX != (0xFFFFFFFFU) ) || ( LONG_MAX != (0x7FFFFFFF) )
+#error Code was generated for compiler with different sized ulong/long. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if 0
+
+/* Skip this size verification because of preprocessor limitation */
+#if ( ULLONG_MAX != (0xFFFFFFFFFFFFFFFFULL) ) || ( LLONG_MAX != (0x7FFFFFFFFFFFFFFFLL) )
+#error Code was generated for compiler with different sized ulong_long/long_long. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+#endif
+
+extern int16_T rateLimiter_j(int16_T rtu_u, int16_T rtu_rate, DW_rateLimiter
+  *localDW);
+
+/*===========*
+ * Constants *
+ *===========*/
+#define RT_PI                          3.14159265358979323846
+#define RT_PIF                         3.1415927F
+#define RT_LN_10                       2.30258509299404568402
+#define RT_LN_10F                      2.3025851F
+#define RT_LOG10E                      0.43429448190325182765
+#define RT_LOG10EF                     0.43429449F
+#define RT_E                           2.7182818284590452354
+#define RT_EF                          2.7182817F
+
+/*
+ * UNUSED_PARAMETER(x)
+ *   Used to specify that a function parameter (argument) is required but not
+ *   accessed by the function body.
+ */
+#ifndef UNUSED_PARAMETER
+# if defined(__LCC__)
+#   define UNUSED_PARAMETER(x)                                   /* do nothing */
+# else
+
+/*
+ * This is the semi-ANSI standard way of indicating that an
+ * unused function parameter is required.
+ */
+#   define UNUSED_PARAMETER(x)         (void) (x)
+# endif
+#endif
+
+/* Output and update for atomic system: '<Root>/rateLimiter' */
+int16_T rateLimiter_j(int16_T rtu_u, int16_T rtu_rate, DW_rateLimiter *localDW)
+{
+  int16_T rtb_UnitDelay;
+  int16_T rtb_Sum1;
+  int16_T rtb_Gain;
+  int16_T rty_y_0;
+
+  /* UnitDelay: '<S2>/UnitDelay' */
+  rtb_UnitDelay = localDW->UnitDelay_DSTATE;
+
+  /* Sum: '<S2>/Sum1' incorporates:
+   *  DataTypeConversion: '<S1>/Data Type Conversion1'
+   */
+  rtb_Sum1 = (int16_T)((int16_T)(rtu_u << 4) - rtb_UnitDelay);
+
+  /* Switch: '<S3>/Switch2' incorporates:
+   *  RelationalOperator: '<S3>/LowerRelop1'
+   */
+  if (rtb_Sum1 > rtu_rate) {
+    rtb_Sum1 = rtu_rate;
+  } else {
+    /* Gain: '<S1>/Gain' */
+    rtb_Gain = (int16_T)-rtu_rate;
+
+    /* Switch: '<S3>/Switch' incorporates:
+     *  RelationalOperator: '<S3>/UpperRelop'
+     */
+    if (rtb_Sum1 < rtb_Gain) {
+      rtb_Sum1 = rtb_Gain;
+    }
+
+    /* End of Switch: '<S3>/Switch' */
+  }
+
+  /* End of Switch: '<S3>/Switch2' */
+
+  /* Sum: '<S2>/Sum2' */
+  rty_y_0 = (int16_T)(rtb_Sum1 + rtb_UnitDelay);
+
+  /* Update for UnitDelay: '<S2>/UnitDelay' */
+  localDW->UnitDelay_DSTATE = rty_y_0;
+  return rty_y_0;
+}
+
+/* Model step function */
+void rateLimiter_step(RT_MODEL *const rtM)
+{
+  DW *rtDW = ((DW *) rtM->dwork);
+  ExtU *rtU = (ExtU *) rtM->inputs;
+  ExtY *rtY = (ExtY *) rtM->outputs;
+
+  /* Outputs for Atomic SubSystem: '<Root>/rateLimiter' */
+
+  /* Outport: '<Root>/y' incorporates:
+   *  Inport: '<Root>/rate'
+   *  Inport: '<Root>/u'
+   */
+  rtY->y = (int16_T) rateLimiter_j(rtU->u, rtU->rate, &rtDW->rateLimiter_j0);
+
+  /* End of Outputs for SubSystem: '<Root>/rateLimiter' */
+}
+
+/* Model initialize function */
+void rateLimiter_initialize(RT_MODEL *const rtM)
+{
+  /* (no initialization code required) */
+  UNUSED_PARAMETER(rtM);
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

01_Matlab/99_RecycleBin/RateLimiter_fixdt/rateLimiter.h

@@ -0,0 +1,99 @@
+/*
+ * File: rateLimiter.h
+ *
+ * Code generated for Simulink model 'rateLimiter'.
+ *
+ * Model version                  : 1.1186
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sun Oct 27 16:29:07 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_rateLimiter_h_
+#define RTW_HEADER_rateLimiter_h_
+#ifndef rateLimiter_COMMON_INCLUDES_
+# define rateLimiter_COMMON_INCLUDES_
+#include "rtwtypes.h"
+#endif                                 /* rateLimiter_COMMON_INCLUDES_ */
+
+/* Macros for accessing real-time model data structure */
+
+/* Forward declaration for rtModel */
+typedef struct tag_RTM RT_MODEL;
+
+/* Block signals and states (auto storage) for system '<Root>/rateLimiter' */
+typedef struct {
+  int16_T UnitDelay_DSTATE;            /* '<S2>/UnitDelay' */
+} DW_rateLimiter;
+
+/* Block signals and states (auto storage) for system '<Root>' */
+typedef struct {
+  DW_rateLimiter rateLimiter_j0;       /* '<Root>/rateLimiter' */
+} DW;
+
+/* External inputs (root inport signals with auto storage) */
+typedef struct {
+  int16_T u;                           /* '<Root>/u' */
+  int16_T rate;                        /* '<Root>/rate' */
+} ExtU;
+
+/* External outputs (root outports fed by signals with auto storage) */
+typedef struct {
+  int16_T y;                           /* '<Root>/y' */
+} ExtY;
+
+/* Real-time Model Data Structure */
+struct tag_RTM {
+  ExtU *inputs;
+  ExtY *outputs;
+  DW *dwork;
+};
+
+/* Model entry point functions */
+extern void rateLimiter_initialize(RT_MODEL *const rtM);
+extern void rateLimiter_step(RT_MODEL *const rtM);
+
+/*-
+ * These blocks were eliminated from the model due to optimizations:
+ *
+ * Block '<S3>/Data Type Duplicate' : Unused code path elimination
+ * Block '<S3>/Data Type Propagation' : Unused code path elimination
+ */
+
+/*-
+ * The generated code includes comments that allow you to trace directly
+ * back to the appropriate location in the model.  The basic format
+ * is <system>/block_name, where system is the system number (uniquely
+ * assigned by Simulink) and block_name is the name of the block.
+ *
+ * Note that this particular code originates from a subsystem build,
+ * and has its own system numbers different from the parent model.
+ * Refer to the system hierarchy for this subsystem below, and use the
+ * MATLAB hilite_system command to trace the generated code back
+ * to the parent model.  For example,
+ *
+ * hilite_system('BLDCmotorControl_FOC_R2017b_fixdt/rateLimiter')    - opens subsystem BLDCmotorControl_FOC_R2017b_fixdt/rateLimiter
+ * hilite_system('BLDCmotorControl_FOC_R2017b_fixdt/rateLimiter/Kp') - opens and selects block Kp
+ *
+ * Here is the system hierarchy for this model
+ *
+ * '<Root>' : 'BLDCmotorControl_FOC_R2017b_fixdt'
+ * '<S1>'   : 'BLDCmotorControl_FOC_R2017b_fixdt/rateLimiter'
+ * '<S2>'   : 'BLDCmotorControl_FOC_R2017b_fixdt/rateLimiter/Rate_Limiter'
+ * '<S3>'   : 'BLDCmotorControl_FOC_R2017b_fixdt/rateLimiter/Rate_Limiter/Saturation Dynamic'
+ */
+#endif                                 /* RTW_HEADER_rateLimiter_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

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+    "LockScale",
+    "RndMeth",
+    "SaturateOnIntegerOverflow",
+    "CollapseDim",
+    "CollapseMode",
+    "SampleTime"
    ],
    "values":[
-    "0",
+    "round",
-    "Inherited",
+    "|++",
-    "-1",
-    "",
-    "",
     "off",
-    [
+    "Inherit: Same as first input",
-    ],
+    "[]",
-    "Auto"
+    "[]",
+    "Inherit: Same as first input",
+    "off",
+    "Simplest",
+    "off",
+    "1",
+    "All dimensions",
+    "-1"
    ],
    "tabs":[
     "Main",
-    "State Attributes",
+    "Signal Attributes",
     "-Other"
    ],
    "tabs_idx":[
     0,
-    3,
+    2,
-    4
+    10
    ]
   },
   "viewer":{
@@ -125,57 +134,95 @@
   "obj_viewer":[
   ],
   "finder":{
-   "blocktype":"UnitDelay",
+   "blocktype":"Sum",
    "masktype":""
   }
  },
  {
-  "sid":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2279",
+  "sid":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2697",
-  "className":"Simulink.Sum",
+  "className":"Simulink.DataTypeConversion",
   "icon":"WebViewIcon3",
-  "name":"Sum1",
+  "name":"Data Type Conversion1",
-  "label":"Sum1",
+  "label":"Data Type Conversion1",
   "parent":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2275",
   "inspector":{
    "params":[
-    "IconShape",
-    "Inputs",
-    "InputSameDT",
-    "AccumDataTypeStr",
     "OutMin",
     "OutMax",
     "OutDataTypeStr",
     "LockScale",
+    "ConvertRealWorld",
     "RndMeth",
     "SaturateOnIntegerOverflow",
-    "CollapseDim",
-    "CollapseMode",
     "SampleTime"
    ],
    "values":[
-    "round",
-    "|++",
-    "off",
-    "Inherit: Same as first input",
     "[]",
     "[]",
-    "Inherit: Same as first input",
+    "fixdt(1,16,4)",
     "off",
-    "Simplest",
+    "Real World Value (RWV)",
+    "Floor",
     "off",
-    "1",
-    "All dimensions",
     "-1"
    ],
+   "tabs":[
+    "Parameter Attributes",
+    "-Other"
+   ],
+   "tabs_idx":[
+    0,
+    7
+   ]
+  },
+  "viewer":{
+   "jshandler":"webview/handlers/ElementHandler"
+  },
+  "obj_viewer":[
+  ],
+  "finder":{
+   "blocktype":"DataTypeConversion",
+   "masktype":""
+  }
+ },
+ {
+  "sid":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2528",
+  "className":"Simulink.UnitDelay",
+  "icon":"WebViewIcon3",
+  "name":"UnitDelay",
+  "label":"UnitDelay",
+  "parent":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2275",
+  "inspector":{
+   "params":[
+    "InitialCondition",
+    "InputProcessing",
+    "SampleTime",
+    "StateName",
+    "CodeGenStateStorageTypeQualifier",
+    "StateMustResolveToSignalObject",
+    "StateSignalObject",
+    "StateStorageClass"
+   ],
+   "values":[
+    "0",
+    "Inherited",
+    "-1",
+    "",
+    "",
+    "off",
+    [
+    ],
+    "Auto"
+   ],
    "tabs":[
     "Main",
-    "Signal Attributes",
+    "State Attributes",
     "-Other"
    ],
    "tabs_idx":[
     0,
-    2,
+    3,
-    10
+    4
    ]
   },
   "viewer":{
@@ -184,7 +231,7 @@
   "obj_viewer":[
   ],
   "finder":{
-   "blocktype":"Sum",
+   "blocktype":"UnitDelay",
    "masktype":""
   }
  },
@@ -255,53 +302,6 @@
    "masktype":""
   }
  },
- {
-  "sid":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2697",
-  "className":"Simulink.DataTypeConversion",
-  "icon":"WebViewIcon3",
-  "name":"Data Type Conversion1",
-  "label":"Data Type Conversion1",
-  "parent":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2275",
-  "inspector":{
-   "params":[
-    "OutMin",
-    "OutMax",
-    "OutDataTypeStr",
-    "LockScale",
-    "ConvertRealWorld",
-    "RndMeth",
-    "SaturateOnIntegerOverflow",
-    "SampleTime"
-   ],
-   "values":[
-    "[]",
-    "[]",
-    "fixdt(1,16,4)",
-    "off",
-    "Real World Value (RWV)",
-    "Floor",
-    "off",
-    "-1"
-   ],
-   "tabs":[
-    "Parameter Attributes",
-    "-Other"
-   ],
-   "tabs_idx":[
-    0,
-    7
-   ]
-  },
-  "viewer":{
-   "jshandler":"webview/handlers/ElementHandler"
-  },
-  "obj_viewer":[
-  ],
-  "finder":{
-   "blocktype":"DataTypeConversion",
-   "masktype":""
-  }
- },
  {
   "sid":"BLDCmotorControl_FOC_R2017b_fixdt:9098:2697#out:1",
   "className":"Simulink.Line",